Motorola 68k SBC then MVME.
Will be based on a 68040 CPU.
Two “sandwich” socket with broken-out pins for Data/Address/Signals/Clocks etc. will be done for logic analysis.

Current stuff

  • 68040 CPU and 68360 in 040 companion mode
  • Two serial ports
  • Two SIMM for RAM
  • Two 29C1024 EPROMs
  • 7segments display reflecting 68040 PST0-3 pins
  • Three switches connected to PORT B in input
  • Three LEDs connected to PORT B in output


  • Check for decoupling capacitors
  • Print schematic and hand check pins
  • What can alternatively done with PORT A if removing one serial port ?
  • How to implement Ethernet on the QUICC
    • Via MC68160 (NO CAM, useless)
  • SCSI I/O via NCR chip
  • Headers to plug HP Logic Analyser Probes to debug BUS/ADDR problems

Planned in the future

  • Fork to migrate to a MVME platform
    • I already have a working -new condition- MVME Backplane

Used ressources


  • Project restarted
  • Started working on a simple SBC board using a 68040 and 68360.
  • Stuck on the RESET and CLOCKS
    • Need to design the RESET and CLOCK around a MC88920
    • Schematic part done, CPU and QUICC missing
  • Found gryphon 68030 design schematics, will study and work on my own based on it
  • Need to work on some reverse-engeneering of the motorola board.
    • mainly for bus ⇔ chips and serial part
  • Got a VME backplane and a mvme “dead” board from miod@openbsd
  • Worked on a power supply converter ATX ⇔ VME backplane, with standby and running led and switch.


  • sbc/68k.txt
  • Last modified: 2016/12/28 21:15
  • (external edit)